Datamax-oneil microFlash 2te Quick Reference Programming Guide Uživatelský manuál stáhnout pdf (Strana 54)

Querying the Printer

Datamax-O’Neil Quick Reference Programming

Version Reply Explanation

Memory Query

Memory Reply Explanation

Query Reply Definition

F n.nn Firmware version is n.nn.

B n.nn Boot code version is n.nn.

D n.n Download (fonts, graphics, formats) version is n.nn.

Memory Query

Query Format ESC{MY?}

Reply Format {MY!

:x;

:x}

Function Returns the size of all memory available in the printer,

including the amounts used and the amount remaining.

Available for original MF2/MF3/2t/4t and radio ready 2t/3l/4t.

Reply Example {MY!

:1M;

:AMD;

:1M;

:049152;

:000512}

Reply Example

Explanation

MY! - Reply to a memory query.

:1M; - This printer contains a 1M bit Flash memory

:AMD; - The Flash manufacturer is AMD.

:1M; - RAM Size = 1M.

:049152; - Total Flash area available for download is

49,152 bytes.

:000512; - Download Flash memory Remaining. Out of

49,152 bytes, 512 bytes are available.

Query Reply Definition

FS 1 Meg,

4 Meg

Flash size = 1 Meg (128K bytes) or 4 Meg (512K bytes)

FM AMD Flash manufacturer = AMD

RS 1 Meg RAM size = 1 Meg (128K bytes)

DT nnnnnn Download total area = nnnnnn bytes. This is the size after

the application program is downloaded to Flash and after

the boot code size is deducted.

DR nnnnnn Download RAM remaining = nnnnnn bytes. Download total

and download remaining are the same values only if no

fonts or graphics were downloaded.

1 2 ... 49 50 51 52 53 54 55 56 57 58 59 ... 71 72

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Altera SDI II MegaCore Manuale Utente (89 pagine)

Marchio: Altera | Categoria: Measuring instruments | Dimensione: 1.24 MB |

Indice

SDI II IP Core User Guide

Contents

Altera Corporation

Item Description

SDI II IP Core Overview

SMPTE372 Dual Link Support

HD Dual-Link Receiver

3-GB Receiver

SMPTE RP168 Switching Support

Dynamic TX Clock Switching

UG-01125

2015.05.04

Resource Utilization

Block Memory Bits

Registers

Secondary Logic

Installation and Licensing

Design Walkthrough

Launching IP Catalog

Parameterizing the IP Core

Timing Violation

Programming an FPGA Device

Design Reference

SDI II IP Core Parameters

Parameter Value Description

Design Examples

Testbench

Example Design

Input Signal Connection

Design Example

Video Pattern Generator

Send Feedback

Related Information

Interfaces

Logical Channel Number

Signal Width Directio

Description

Protocol

TX PHY Management

& PHY Adapter

TX Protocol Transceiver

Payload ID

Transceiver

Receiver

RX Protocol

RX PHY Management

Management

& PHY Adapter Transceiver

PHY Adapter

Submodules

Insert/Check CRC

Insert Payload ID

Match TRS

Scrambler

TX Sample

Clock Enable Generator

RX Sample

Step Process Description

Detect Video Standard

Detect 1 and 1/1.001 Rates

Transceiver Controller

Descrambler

TRS Aligner

OUTPUT DATA

OUTPUT LN

Sync Streams

Convert SD Bits

Insert Sync Bits

Clocking Scheme

SDI II IP Core Signals

Additional Information

Date Version Changes

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Datamax-oneil microFlash 2te Quick Reference Programming Guide Uživatelský manuál Strana 54

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